From 24f73665e2d8ea8e4de2fe4f900bc539d7f7b989 Mon Sep 17 00:00:00 2001
From: hnluo <haoneng.lhn@alibaba-inc.com>
Date: 星期一, 17 四月 2023 15:49:45 +0800
Subject: [PATCH] Merge pull request #367 from alibaba-damo-academy/dev_lhn2

---
 funasr/export/README.md |   15 +++++++++++++--
 1 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/funasr/export/README.md b/funasr/export/README.md
index bde1e94..4d09ff8 100644
--- a/funasr/export/README.md
+++ b/funasr/export/README.md
@@ -7,7 +7,7 @@
 
 ## Install modelscope and funasr
 
-The installation is the same as [funasr](../../README.md)
+The installation is the same as [funasr](https://github.com/alibaba-damo-academy/FunASR/blob/main/README.md#installation)
 
 ## Export model
    `Tips`: torch>=1.11.0
@@ -17,7 +17,7 @@
        --model-name [model_name] \
        --export-dir [export_dir] \
        --type [onnx, torch] \
-       --quantize \
+       --quantize [true, false] \
        --fallback-num [fallback_num]
    ```
    `model-name`: the model is to export. It could be the models from modelscope, or local finetuned model(named: model.pb).
@@ -30,6 +30,16 @@
 
    `fallback-num`: specify the number of fallback layers to perform automatic mixed precision quantization.
 
+## Performance Benchmark of Runtime
+
+### Paraformer on CPU
+
+[onnx runtime](https://github.com/alibaba-damo-academy/FunASR/blob/main/funasr/runtime/python/benchmark_onnx.md)
+
+[libtorch runtime](https://github.com/alibaba-damo-academy/FunASR/blob/main/funasr/runtime/python/benchmark_libtorch.md)
+
+### Paraformer on GPU
+[nv-triton](https://github.com/alibaba-damo-academy/FunASR/tree/main/funasr/runtime/triton_gpu)
 
 ## For example
 ### Export onnx format model
@@ -55,3 +65,4 @@
 
 ## Acknowledge
 Torch model quantization is supported by [BladeDISC](https://github.com/alibaba/BladeDISC), an end-to-end DynamIc Shape Compiler project for machine learning workloads. BladeDISC provides general, transparent, and ease of use performance optimization for TensorFlow/PyTorch workloads on GPGPU and CPU backends. If you are interested, please contact us.
+

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